Intel CEO Paul Otellini gave investors, developers and its competitors plenty to digest during his keynote address at the Intel Developer Forum Tuesday when he laid out the chipmaker’s faster, lighter and more energy-efficient vision for what he called the “next mainstream.”
But before delving into Intel’s ambitious future plans to reduce the idling power consumption of its chips by a factor of 10 by 2010 and deliver a new generation of graphics-integrated processors developed on its 45-nanometer manufacturing technology by 2009, Otellini clarified exactly what’s going in the here and now.
He confirmed Intel will launch the server and high-end desktop versions of its Penryn generation chips on November 12 and announced the company has completed the design for its radically redesigned Nehalem microarchitecture.
“Wafers are moving through the fab as I speak,” he said. “We’re very, very excited about customer adoption with over 750 design wins around the Penryn family.”
Along with delivering this latest generation of chips to its bread-and-butter server and desktop customers, Otellini said the company will also ship another “bunch” of Penryn-powered products geared for mobile devices in the first quarter of 2008.
Nehalem, which will succeed Intel’s Core microprocessor architecture, will have up to eight cores and each core will be able to process two threads simultaneously, giving each processor the capacity to process up to 16 threads at the same time.
Otellini said Nehalem’s modular architecture will make it possible to use the architecture as a template for a variety of products with different cache sizes, core counts, input/output options and power demands.
Nehalem will make its debut in the second half of 2008, Otellini said.
Looking even farther down the road, Otellini said Intel will begin production using 32-nanometer process technology in 2009. He proudly showed attendees what he called the world’s first 32-nanometer product, a 291-megabit array die with more than 1.9 billion transistors.
“This gives us the confidence to build a mainstream microprocessor in two years on this technology,” he said, adding that 32-nanometer products will be designed using the second generation of its high-k metal gate transistor technology which replaces silicon dioxide with hafnium as an insulator to produce faster and more energy-efficient chips.
Daniel Leal, a solution designer at Avnet, said Tuesday’s announcements reflect Intel’s determination to meet or surpass Moore’s Law every two years.
“It’s the future,” he said. “This is obviously the next wave and giving customers the ability to run dual quads at a lower rate of energy consumption makes a huge difference. I really think Intel has basically just jumped way ahead of AMD.”
Speaking of AMD, Intel gave its chief rival something new to chew on Tuesday when it announced it will ship a processor with 45-nanometer graphics built onto the chip in 2009, an obvious response to AMD’s Fusion processor developed in the wake of its 2006 acquisition of ATI Technologies.
In 2010, Intel plans to unveil a chip built on 32-nanometer processing technology that includes graphics technology on the chip. For hard-core gamers, Otellini said Intel will manufacture a processor called Larrabee, scheduled for demonstration sometime in 2008, that will include several configurable cores and a shared cache memory.
As for AMD’s plan to deliver a tri-core processor sometime in the first quarter of 2008, Otellini wasn’t particularly impressed.
“We don’t see any advantage of three cores on one design,” he said. “We do see a distinct advantage of having all the dies on our core work.”